IBM Develop High Thermal Conductivity Interface Technology: The IBM Zurich Research Laboratory has developed a technique, called "high thermal conductivity interface technology," which allows a twofold improvement in heat removal over current methods. This paves the way for continued development of creative electronic products through the use of more powerful chips without complex and costly systems simply to cool them. The approach used by IBM addresses the connection point between the hot chip and the various cooling components used today to draw the heat away, including heat sinks. Special particle-filled viscous pastes are typically applied to this interface to guarantee that chips can expand and contract owing to the thermal cycling. This paste is kept as thin as possible in order to transport heat from chip to the cooling components efficiently. Using sophisticated micro-technology, the IBM researchers developed a chip cap with a network of tree-like branched channels on its surface. The pattern is designed such that when pressure is applied, the paste spreads much more evenly and the pressure remains uniform across the chip. This allows the right uniformity to be obtained with nearly two times less pressure, and a ten times better heat transport through the interface. Looking beyond the limits of air-cooling systems, Zurich researchers are taking their concept of branched channel design even further and are developing a novel and promising approach for water-cooling. Called direct jet impingement, it squirts water onto the back of the chip and pulls it off again in a perfectly closed system using an array of up to 50,000 tiny nozzles and a complicated tree-like branched return architecture. By developing a perfectly closed system, there is also no fear of coolant getting into the electronics on the chips. The team has demonstrated cooling power densities of up to 370 Watts per square centimeter with water as coolant."

High Heat Flux Nuclear Waterblocks: These are three high heat flux (10-20 MW/m2) copper waterblock test patterns for the International Thermonuclear Experimental Reactor. Boeing apparently produced these channels with the goal of incorporating complex coolant channels by close tolerance machining to create thin webs or slots. These webs and slots are 1-1.5 mm wide and 4-6 mm tall or deep. Although some of the detail parameters are proprietary, the general design of the coolant channel shows potential for processor cooling applications.

Thin Film Heat Exchanger : "The dimensions of MCFs are ideally suited for heat transfer applications. Due to the small size of the capillaries, the main resistance to heat transfer is not from the plastic that the film is made from, but the heat transfer properties of the laminar flow within the capillaries. This means that, in spite of their plastic construction, the performance of MCF micro heat exchangers is comparable to those made of copper where the thermal conductivity of the base material is over 2000 times greater. The flexible nature of MCFs combined with their excellent heat transfer properties have led to proof of concept experiments with CPU cooling and also the evaluation of MCFs in the construction of sports therapy devices." CHENG: "The image above shows the prototype CPU cooler attached to an old AMD 166MHz CPU. With water at room temperature flowing through the film at a rate of 40ml/min, the chip was held several degrees cooler than with the conventional heatsink and fan arrangement. With neither the fan nor the MCF cooler, the CPU would overheat within two minutes."

IBM Cools 3-D Processors with H2O: "IBM scientists unveiled a powerful and efficient technique to cool 3-D chip stacks with water. In collaboration with the Fraunhofer Institute in Berlin, they demonstrated a prototype that integrates the cooling system into a 3-D chip by piping water directly between each layer in the stack. These so-called 3-D chip stacks—in which chips and memory devices that traditionally sit side-by-side on a silicon wafer are layered on top of one another—presents one of the most promising approaches to enhancing chip performance beyond its predicted limits. This follows IBM's leadership in advancing chip-stacking technology in a manufacturing environment announced one year ago, which drastically shortens the distance that information needs to travel on a chip to just 1/1000th of that on 2-D chips and allows the addition of up to 100 times more channels, or pathways, for that information to flow. Using the superior thermophysical qualities of water, scientists were able to demonstrate a cooling performance of up to 180 W/cm2 per layer for a stack with a typical footprint of 4 cm2. "This truly constitutes a breakthrough. With classic backside cooling, the stacking of two or more high-power density logic layers would be impossible," states Bruno Michel, manager of the chip cooling research efforts at the IBM Zurich Lab. To assemble the individual layers, Brunschwiler with colleagues from the Fraunhofer Institute developed a sophisticated thin-film soldering technique. Using this technique, scientists achieved the high quality, precision and robustness needed to ensure excellent thermal contacts as well as electrical contacts without shorts. In the final setup, the assembled stack is placed in a silicon cooling container resembling a miniature basin. The water is pumped into the container from one side and flows between the individual chip layers before exiting at the other side. Using simulations, scientists extrapolated the experimental results of their test vehicle to a 4-cm2 chip stack and achieved a cooling performance of 180 W/cm2."